Johan Euphrosine
Johan Euphrosine
isn't this just a warning? (i.e: i doesn't stop the flow)
> It is, but it's a somewhat scary warning. I agree, I was mostly worrying if the issue was actually blocking the OP or not :)
I'd like us to revisit this, since this is causing extra confusion with the recent gf180mcu support, see https://github.com/efabless/caravel_user_project/issues/176 The project being used as a multi-technology template now, its result...
alternatively, the github action could generate the gds for `sky130` and `gf180mcu` and commit them to a different branch? That would be assuming that the efabless platform is capable of...
One possible way to address this could be for the efabless platform to support pulling artefacts from non-default branches allowing users of this repo to keep `main` for designs and...
similarly are files in https://github.com/efabless/caravel_user_project/tree/main/verilog/includes still used? (they don't seem to be using a consistent syntax)
@marwaneltoukhy is https://github.com/efabless/caravel_user_project/blob/main/verilog/rtl/uprj_netlists.v also used in simulation?
@xobs pointed out some documentation is already available (albeit outdated) here: https://github.com/efabless/caravel/tree/main#required-directory-structure
@jeffdi it seems this was fixed in https://github.com/efabless/caravel_user_project/pull/206, is there a reason this didn't make it into the `main` branch?