Johan Euphrosine

@rw1nkler suggested that could also be a good standalone thing to review and land soonish.

@hongted mentioned that @grebe might be interested to look at the fifo implementation in that PR: https://github.com/google/xls/pull/1215/files#diff-e139db19aacd0f9c2a28123c053722349c6ef5ba135d288f53b92797112614dd

oh thanks! sorry I didn't get to it before you did :)

met @efxmnalim and @manoj153 at a workshop at FOSSASIA, they might be able to do the required connection.

Now that klayout 0.28 is out, here is a small snippets on how to make it work: ``` python -m pip install klayout ``` ``` import klayout.db as db #...

@tvt173 yep, I'm in the process of updating https://github.com/chipsalliance/silicon-notebooks to rely on klayout instead of gdstk (see https://github.com/chipsalliance/silicon-notebooks/issues/30#issuecomment-1345721364). Maybe we could continue the discussion there on how to make it...

@klayoutmatthias is there a way to hide the cell frame using the python API, just like you can do in the 'View / Show Cell Frames' menu? 

> The KLayout DRC checks are currently checking the width for 0.28um, Are you referring to those check? - M5.1 https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_pv/blob/main/klayout/drc/rule_decks/metal5.drc#L24-L26 - MT.1 https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_pv/blob/main/klayout/drc/rule_decks/metaltop.drc#L55-L59 /cc @atorkmabrains

Looking at the current checks would there be an issue applying both rules? i.e: if you pass MT.1 (min 0.44µm) you should also pass M5.1 (min 0.28um).

Related https://github.com/efabless/caravel_user_project/issues/230