pca006132
pca006132
Prototype implementation: ```diff diff --git a/lua/rust-tools/config.lua b/lua/rust-tools/config.lua index 470c82d..ebd1b6b 100644 diff --git a/lua/rust-tools/inlay_hints.lua b/lua/rust-tools/inlay_hints.lua index 8f73e74..8be2b58 100644 --- a/lua/rust-tools/inlay_hints.lua +++ b/lua/rust-tools/inlay_hints.lua @@ -117,6 +117,13 @@ local function get_max_len(bufnr, parsed_data) return...
> We could make it so that the hints that do not fit go entirely to the next line. Not too sure about that though Yes this is an option,...
I think this is not list corruption, but a problem due to unsound escape analysis. It seems that the generated code is not copying the content of `list_a[:]` into `list_b`,...
The slowness is due to allocation request/reply per element, which we can hardly do anything about it. (Some optimization on zynq could make the allocation request per element down to...
> In my mind, the solution here is really just for the comms CPU (core0) not to interpret any of the payload, but ship it to the kernel CPU (core1)...
> For me, exposing messaging as a primitive to kernel code directly (that is, instead of only as a synchronous request/response pair) would be more important than a hard-earned latency...
A hacky solution, not sure if it works for all circumstances: ```diff --- a/artiq/compiler/transforms/inferencer.py +++ b/artiq/compiler/transforms/inferencer.py @@ -6,6 +6,7 @@ from collections import OrderedDict from pythonparser import algorithm, diagnostic, ast...
> > This should not compile > > NAC3 seems to be happy with it. Is it what you expected? > > ```python > @kernel > def bar(ls: list[list[int32]]): >...
> @pca006132 how is the DMA performance on Zynq? Does the ARM RAM controller give better performance? There are some debug code and cache flushing in the current artiq-zynq master....
> cool! That's a big step forwards. Is that with the analyzer enabled? I remember there being quite a long tail to the underflow distribution where we'd very occasionally find...