nmigen-issue-migration

**Comment by [whitequark](https://github.com/whitequark)** _Tuesday Sep 10, 2019 at 10:26 GMT_ ---- > For example, `RegStorage` has a parameter you can pass to it `resettable=True` that will wrap the underlying `CSRStorage`...

**Comment by [xobs](https://github.com/xobs)** _Tuesday Sep 10, 2019 at 10:34 GMT_ ---- > Shouldn't all CSRs be reset when the underlying core is reset as well? Having a separate reset just...

**Comment by [whitequark](https://github.com/whitequark)** _Tuesday Sep 10, 2019 at 10:49 GMT_ ---- > When the host does a USB reset, it is necessary to reset this address. So I wire up...

**Comment by [mithro](https://github.com/mithro)** _Tuesday Sep 10, 2019 at 17:48 GMT_ ---- Couple of random thoughts; * Divorcing the CSRs from the bus they are implimented on sounds great. * Being...

**Comment by [whitequark](https://github.com/whitequark)** _Tuesday Sep 10, 2019 at 17:58 GMT_ ---- > * It might make sense to seperate the code to generate accessors from the RTL totally. The code...

**Comment by [sbourdeauducq](https://github.com/sbourdeauducq)** _Wednesday Sep 11, 2019 at 01:12 GMT_ ---- > The CSR bus uses less resources inside an FPGA than wishbone, so it would be good to keep...

**Comment by [whitequark](https://github.com/whitequark)** _Wednesday Sep 11, 2019 at 10:18 GMT_ ---- Why can't the OR-multiplexing trick be done inside the CSR WB adapter, anyway?

**Comment by [mithro](https://github.com/mithro)** _Wednesday Sep 11, 2019 at 16:22 GMT_ ---- I have no actual proof here, so it would be good for someone to do some real analysis rather...

**Comment by [sbourdeauducq](https://github.com/sbourdeauducq)** _Thursday Sep 12, 2019 at 00:49 GMT_ ---- You can make a 8-bit Wishbone bus. The only real differences between Wishbone and CSR with read-enable signal are:...

**Comment by [HarryHo90sHK](https://github.com/HarryHo90sHK)** _Tuesday Sep 24, 2019 at 03:36 GMT_ ---- A long time ago, someone said the read/write perspectives in MiSoC's CSRs are inconsistent ([link](https://github.com/m-labs/migen/issues/30)). Would you guys think...