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                                            Norbert Kremeris

RocketChip: MEM port to LiteDRAM width matching (internal vs. LiteX AXIUpConverter)

@gsomlo I can confirm that booting Linux from SD with --cpu-mem-width 2 (128 bits) did work when we tested it (~2 months ago) on Digilent Nexys Video (no L2 cache)

RocketChip with L2 cache - works in litex sim, works on digilent nexys video with cpu-mem-width is 64, breaks with 128

> I have a very stupid, basic question: how did you "connect" the L2 InclusiveCache and RocketChip sources? I.e., where did you copy the rocket-chip-inclusive-chache git repo w.r.t. the rocket-chip...

RocketChip with L2 cache - works in litex sim, works on digilent nexys video with cpu-mem-width is 64, breaks with 128

@gsomlo Thank you very much for your time spent investigating and writing up your results, I will be following the issues around this :)