Michael Singer

In the top right corner of page 8, the ``!OUT`` and ``OUT`` inputs of the ``PIN_BI`` cell of A3 receive the signals ``A0_A`` and ``A0_B`` respectively. It should be A3...

External pin P15 has a second signal line connected to it, just like P14. It should look like this (on page 5): 

``FF0F_RD`` and ``FF0F_WR`` generated on page 7 by ``ROLO`` and ``REFA`` are active low signals. They should be called ``!FF0F_RD`` and ``!FF0F_WR``. They are used on page 2.

``BEXU`` on page 11 is not a NOR, it is a NAND cell.

``HUMA`` and ``EVYF`` on page 14 are not NORs, they are NAND cells.

``!WAVE_RAM_RD`` is generated on page 17 by the cell ``CAZU``. It is inverted two times (by the NAND ``BENA`` and by ``CAZU``), therefore it should be called ``WAVE_RAM_RD`` (without the...

I know this is pedantic and doesn't really change anything, because ``APU_WR`` and ``CPU_WR`` are basically the same signal with just a bit delay from the two inverters. I followed...

I think that the DTFFs ``AFUR`` and ``APUK`` on page 1 trigger on the negative edge of ``ATAL_4MHZ``. At least it must be the opposite edge that ``ADYK`` and ``ALEF``...