mrbilandi

Trouble Accessing CVA6 via SSH

3

Hello, I have synthesized the CVA6 RTL code for Genesys2 as described in the README file, built the Linux image using the CVA6-SDK, and now I have Linux running on...

Porting CVA6 to VCU118: SPI Signal Issues

6

I am going to port CVA6 to the VCU118 board. I have synthesized the FPGA code for the VCU118 and used the PMOD micro SD card adapter from Digilent. However,...

This PR introduces support for the VCU118 FPGA platform in ara-pulpv1-os branch, implementing necessary updates across configuration, boot, and build scripts, along with FPGA source files.

Description: This pull request adds support for the VCU118 board by modifying several existing files and introducing new files. The changes made are primarily to the hardware constraints, scripts, and...

How to Implement and Use a Custom Instruction in CVA6

2

Hi I want to implement a new instruction, but I can't find a clear explanation of how to do it. Is there any guide on how to add a custom...

Kernel Build Failure After Increasing Rootfs Size

10

Hi, I encountered an issue when attempting to rebuild the kernel in the CVA6 SDK after adding a significant amount of data (around 10GB) to the root filesystem (rootfs). During...

Memory Alignment Limitation in Ara

2

Hello, I am using SYCL for vectorization. I implemented a simple vector addition (c = a + b, where a, b, and c are double arrays like double a[4096]) as...

Illegal Instruction Warning in riscv_v_first_use_handler

1

Hello When I am attempting to offload an operation to the Ara (in Cheshire+Ara), the kernel logs a warning about an illegal instruction exception repeatedly in the riscv_v_first_use_handler. This is...