Martin Hans

Adds support for aliases.

1

Maps the VHDL alias keyword to the Verilog alias keyword.

This allows the scheduler to be stopped and restarted again afterwards.

What are the build instructions for the Experimental branch?

6

**Versions** - Candle version: Experimental] **PC info** - OS: Linux **Description** I'd like to contribute to the development. It seems like the development is currently happening in the Experimental branch...

Reopening device fails

6

I find that I frequently get a timeout when trying to open a BleDevice that I have recently closed. This happens when I'm running a script, interrupt it and then...