circt
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Circuit IR Compilers and Tools
This is the Grand Central (GCT) Taps variant of #3494. GCT Taps does not work on a deduplicated design. We need to fix this with a better representation for XMRs...
Grand Central (GCT) Views do not currently work when combined with FIRRTL's deduplication pass. Consider the following circuit and annotation file. `Top` instantiates `Foo` and `Foo_1`. Each of those, respectively,...
This PR lowers the `FMemModuleOp` to `HWModuleGeneratedOp` and `HWGeneratorSchemaOp` instead of `HWModuleExternOp`. Also ensure the `HWModuleGeneratedOp` is lowered exactly as `HWModuleExternOp` in `ExportVerilog`. This PR is an attempt to preserve...
Add an interface for dialects and operations to provide reduction patterns. As a first step these should probably be just simple lists of reduction patterns, but at a later point...
Related to #3480 ```mlir %0 = hw.enum.constant A : !hw.enum %1 = hw.enum.constant B : !hw.enum %2 = : i1 ``` We'd expect the ability to compare two SSA enum...
Input: ```mlir hw.module private @Foo() -> (){ sv.initial { %param_x = sv.localparam : i42 { value = 11: i42 } } } ``` `$ circt-opt -export-verilog` produces: ```verilog module Foo();...
This was discussed on Discord nearly a year ago: https://discord.com/channels/636084430946959380/742572728787402763/873039553517215854. We just never got around to implementing it. The Discord points out a patch where IREE adopts a similar approach:...
As discussed in #1591, it would make sense to have `circt-reduce` provide a few default testers that cover the main things people want to check for in tool output: specific...
With https://github.com/llvm/circt/pull/3452, rudimentary enum support is now available in CIRCT. However, this commit leaves encoding of the enum up to a lowering pass (which currently, in #3478, will leave this...
Emitting all of the binds into monolithic *.bindings.sv files makes it impossible for tools to work with a subset of the design. If they are only interested in a specific...