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We currently have two Vivado-centric mitigations to address pretty egregious bugs in Vivado tooling. One of these is mitigated with a Vivado-specific SystemVerilog attribute. Change the SystemVerilog attribute to be...

seldridge

This commit adds inlay hint support to the Verilog LSP server. It currently supports two ways of displaying inlay hints: 1. Built-in inlay hints for function calls and module instantiations,...

uenoku

This commit adds "Go to Definition" and "Find References" functionality to the CIRCT Verilog LSP server. These features allow users to navigate between symbol definitions and usages within Verilog source...

uenoku

Add the BLIF dialect.

1

The BLIF dialect implements the extended berkely logic interchange format. This is a format used by some OSS tools, such as some place-and-route tools. This is the format used by...

darthscsi

[ImportVerilog] Cannot compile forward decleared string type

3

I want to support this [sv-tests-results/string_concat_op](https://chipsalliance.github.io/sv-tests-results/?v=circt_verilog+11.4.12.2+string_concat_op) feature, but not sure how to fix it properly. ``` sv module top(); string str; initial begin str = "Hello"; end endmodule ``` `circt-verilog`...

Max-astro

[circt-verilog][llhd][arcilator] Verilog-to-LLVM lowering issues

2

Hi all! There are a few issues related to moore to llvm lowering pipeline. Currently there is no possibility to lower combination logic with control flow operators into LLVM. For...

likeamahoney

[MooreToCore] Support for UnpackedArrayType emission

1

Currently, CIRCT's MooreToCore pass converts unpacked arrays to packed arrays (hw::ArrayType), losing the unpacked semantics. When we've attempted to preserve unpacked arrays by emitting hw::UnpackedArrayType, MLIR raises "failed to legalize...

if-sc

Firtool library is placed at the top-level but it's not consistent.

uenoku

[LLHD][TCM] Fix CFG loops detection

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Hi! This PR fixes CFG loops detection. In the current algorithm confluence block is pushed to workset twice, I fixed that by memorizing control flow.

AndreyVV-100

[circt-synth] Implemented AIG node balancing algorithm

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This implementation is based on a tree-balancing algorithm described in this paper: "https://ieeexplore.ieee.org/abstract/document/6105357". Here is an easy-to-understand example (Which has been added as a test case):  The reference algorithm...

Max-astro