Leon Woestenberg

Also see #195 which might be related.

For ZCU102, I solved this issue in my project: https://github.com/likewise/ibex/blob/super_system/examples/fpga/zcu102/openocd_zynqmp_bscane2.cfg This requires upstream OpenOCD 0.11.0 or later.

I am using OpenOCD 0.11.0 upstream with Ibex RISC-V. I have not tried CORE-V (yet). I will provide you with my OpenOCD log for Ibex in a follow-up. openocd --version...

I have arrived here because the documentation of @function and @external seem to suggest a blocking function can be called that does not stop the simulator while being blocked. In...

The existing Stream interface matches the AXI Stream interface quite well. Also with Stream(Fragment()) you can have framed/packetized AXI Streams. Here is a project where I use Spinal lib Stream...

The width of the TUSER (user) field can be any number of bits, according to the AMBA AXI 4 Stream specification. Thus there is no implicit correlation between the data...

For user bits, I totally agree. And yes, we have the problem that the current components are not spec compliant, so we either break old code or keep being incompatible...

I think BufferCC also needs good timing constraints. Not a false path, because for multi-bit we need to defy bus skew. Here is an expert background: https://support.xilinx.com/s/article/794116?language=en_US that Andreas shared...

My origin problem is that `dev` branches show regressions on my hardware, i.e. I cannot debug my VexRiscv software anymore. I was hoping I could replicate the problem in simulation....

> This does not get correctly tested for in mux_with_selector formal test, > as there is no assert validating the select stream with the output. > (Only the value after...