jdavidberger
jdavidberger
> While I understand that this can be misleading, we can't change the defaults here without breaking a bunch of existing code that uses them currently (we'd either change the...
> There is one other thing to think about here that I overlooked before: both options present an issue for generic peripherals: when building bus independent peripherals (e.g. like here:...
I made the following changes: - Moved typos and simple bug fix changes to the top of the commits - Added testing logic for `SpinalSimWishboneSlaveFactoryTester`. This was to ensure I...
> I think we should stick with the the BusSlaveFactory using/expecting byte addresses consistently. (you can still build systems that e.g. drop to lower two bits of the address in...
Is the idea then that if you have a word granular wishbone bus you should just map it to byte granular before invoking any of the bus interface stuff? I'm...
> what the spec says (please correct me if I'm wrong I don't deal with Wishbone often, both from Wishbone B4, 2.2.3) > The spec seems to mandate that ADR_O...
I agree the spec is sort of hard to decipher with granularity (and with a bunch of other stuff to be honest). The crux of it is for me is...
Sure, do you want me to pop the top few commits off or do you want to just do it on your end? Might be better if you just pull...
Is there a reference or something to point to to resolve the granularity thing? It'd be nice to have a solid thing to point to in the scala doc for...
> Sound fair to me. An option in the wishbone config itself to specify the kind of address. With its default set to "word". This is the existing branch but...