hust-gaoyujing

Results 8 comments of hust-gaoyujing

Is there a document depicting `config_norm` in branch "mlsys-tutorial-2022"?

Thanks for your reply. Your works are fantastic and instructive to who are instrested in accelerator.Looking forward to more of your works.

How to generate the waveform of some modules but not all of the system?

I think it may be addressed in line 284 - 298 in `chipyard/sims/verilator/generated-src/chipyard.TestHarness.CustomGemminiSoCConfig/emulator.cc` as follow: ``` Verilated::randReset(2); Verilated::commandArgs(verilated_argc, verilated_argv); TEST_HARNESS *tile = new TEST_HARNESS; #if VM_TRACE Verilated::traceEverOn(true); // Verilator must...

Chipyard installation fails

Hi,all.I wonder if this problem is solved,and how?

where can i find the simulation logs?

Thanks.You explained it very well.

Is it correct that it generate so many VTestHarness__*.o/cpp when i use `./scripts/build-verilator.sh --debug`

Thank you! It works , but it really takes me a long time.

Is it correct that it generate so many VTestHarness__*.o/cpp when i use `./scripts/build-verilator.sh --debug`

I will be try it later.

"bad syscall #98!" error in running inference

Thanks for your help.We already have a NN algorithm in pyTorch, so we want transform it to onnx file and run it with Gemmini. If i can not solve i...

"bad syscall #98!" error in running inference

@hngenc Your guidance is very professional and it make sense to me. Following your advice, i added some defines to the three files: - for riscv-pk/pk/syscall.h ``` #define SYS_futex 98...