VeriGPU
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hughperkins
OpenSource GPU, in Verilog, loosely based on RISC-V ISA
Need a network on a chip implementation Firstly, what is network on a chip? See https://amstel.estec.esa.int/tecedm/NoC_workshop/GinosarNOC_Tutorial.pdf Buses are becoming spaghetti, so chips nowadays use an internal packet-switching network instead. (slide...
Does anyone have an understanding into the trade-offs of providing an instruction point to each core, or only to each computer unit? Things that occur to me, in favor of...
> There are 31 registers, x1 to x31, along with x0, which is always 0s. Use the same registers for both integers and floats. (this latter point deviates from RISC-V,...
Need a PCIe 4+ interface, for communications between the main computer's CPUs, and the GPU board. The PCIe interface will be used to copy data to and from the mainboard...
We need a DDR4 Controller, to manage global memory, which sits in DDR chips, separate from the main GPU chip. The DDR4 Controller will be used to copy data to...
Have you considered doing a tape out of your VeriGPU using the SKY130 PDK and no-cost shuttle program? > My team launched the fully open source 130nm PDK with SkyWater...
This way all software can be reused. And if possible, make this RVV1.0 ready will be really interesting.
Hello, I'm having troubles in building the project, as the documentation is not that clear. What is happening is that during the exec of the CMake _verilate_ command, the flag...
Hi, I'm trying to add some FVs on the current design, is there any cmodel/golden?
Hey, I want to implement this thing in VAAMAN, ( https://vicharak.in/vaaman ), I can dedicate few 2-3 persons full time to it. But i need some documentation to understand architecture....
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OpenSource GPU, in Verilog, loosely based on RISC-V ISA