vscode-riscv-venus
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hm-riscv
VS Code extension with the Venus RISC-V simulator
I am trying to debug code with `.import` using relative path on Windows, which gives the error below:  ``` Error: ENOENT: no such file or directory, open '/D:/0000/CS61C/CS61C-fa20/proj2/unittests/assembly/TestAbs_test_minus_one.s' ```...
`RISC-V` extension provides comprehensive RISC-V assembly instruction support, covering almost all RISC-V instructions.
// is not accpeted as a comment even though the different risc v extensions do accept it. See [here](https://github.com/sunshaoce/RISC-V?tab=readme-ov-file#:~:text=Comments%3A%20%23%2C%20//%20and%20/*%20*/) or [here](https://github.com/zhuanhao-wu/vscode-riscv-support#:~:text=Comments%3A%20%23%2C%20//%20and%20/*%20*/)
When I write ld x21, 8(x22) It throws "LD instruction is not supported on 32bit System". Does there exist any way to switch to 64 bit?
It should come as no surprise to anyone that drawing on the LED matrix, as it currently stands, is extremely slow. Just to give you an example, it took ~30.2s...
Venus (and other RISC-V simulators) support editing memory values during debugging. Would it be possible to include this feature?
Hello there, First of all: Console input currently is a bit broken. If you output a few chars (like the `$PS1` / `user@machine ~ $ ` prefix usually output by...
Currently the constructor for the LED matrix is exlicitly called, while others are constructor implicitly (better imo): https://github.com/hm-riscv/vscode-riscv-venus/blob/master/src/venusDebug.ts#L251 We should generalize `openView` by taking constructing arguments.
It would be nice to have a final feature before semester starts: Write to console and read from console. Both via ecalls, writing as with current ecalls and reading will...