hchenji

you need to extract `index2string((t*CONFIG.CORES_PER_TILE)+i)}` to a separate local variable and then use it. VCS seems to complain about nesting functions in general - it prefers simple variables as arguments.

I actually use fusesoc to build the vcs version. First, use this version of my forked repo, which has modified .core files to include vcs as a tool: https://github.com/hchenji/optimsoc/commit/7c64becea0f2d03b8fd1b1c7548a4b6807e6114f Next,...

in the optimsoc tutorial, the baremetal-apps repo has code to generate binaries which will run on the cpu cores in each tile. Filename ends in vmem. Just take that and...

Running hello world.vmem with vcs. Using trace, the CPU is stuck in this loop of instructions and never terminates. Any guess why this happens with vcs but not verilator? ```...

I was able to get compute_tile_dm to synthesize in synopsys DC. The main change was to disable per-tile SRAM by setting ENABLE_DRAM to 0 in the config since it slowed...

Also, what is `SimpleBRAM.bsv` supposed to be? Seems to be in the bluespecfrontend directory and needed by make, but I can't get bsc to compile without it.