Mattis
Mattis
I have the same issue with definitions coming from a generate loop: `$scope module genblock[3].mod $end` will also raise the afore mentioned error.
Currently I am just preprocessing the VCD with sed to make them readable by pyvcd. ``` sed -E 's/\[([[:digit:]]+)\]/_\1_/g' waves.vcd > waves2.vcd sed -i -E 's/\$var ([^ ]+ [^ ]+...
Well, it certainly helps, but there is room for improvement. Let me give you a little bit more detail: I'm working on a hierarchical EDA project management. The project is...