Flavien Solt
Flavien Solt
Additionally, @KatCe suggested that you may be interested in [this issue (Y1)](https://github.com/YosysHQ/yosys/issues/3773) as well, despite being seemingly a yosys-related issue.
Hi @fly-1011 thank you for your comment! It's been more than 1 year so I don't remember details unfortunately. Can you observe a mismatch between CVA6 and Spike on this...
Hi @fly-1011 , Thanks for your response! Maybe I wrote NX instead of DZ above, I'm happy to edit this once this gets confirmed. Do you confirm you get 0x18...
Ok! I updated the issue accordingly, thank you for your comment.
Hard to say, it's been a while I haven't touched floating-point numbers. But then why do Spike and the other designs like Rocket not raise the same flags in this...
According to the RISC-V unprivileged spec "NaN Boxing of Narrower Values": > Floating-point compute and sign-injection operations calculate results based on the FLEN-bit values held in the f registers. A...
Hi! Nice catch @youzi27, despite apparently already known. Out of curiosity, how did you proceed for finding this issue? (Cascade maybe?) Thanks! Flavien
Interesting. This is typically the kind of bugs that Cascade would find immediately. Did you have any difficulties with it?
It does :) . The only, small, effort that you would have to supply is to connect Cascade to it. More info in the bottom of the [Readme](https://github.com/comsec-group/cascade-artifacts). If you...
Sounds good! Some more info to help you: the bug is essentially caused by the misuse of the written-back register ID to identify whether the write-back belongs to the instruction...