develone
develone
not needed fusesoc run --target=catzip servant from next.log Info: Annotating ports with timing budgets for target frequency 40.00 MHz Info: Max frequency for clock 'wb_clk_$glb_clk': 72.77 MHz (PASS at 40.00...
see mydoc/notes.txt, mydoc/myhelloworld.png mydoc/usbsetup.png
description : Catboard iCE40HX8K package CT256 FPGA board
initial documentation.