started tinyfpga_bx.pcf

[develone]

o_uart_tx B3 on pmod to be used as q i_clk C8 100MHz

[develone]

not needed
fusesoc run --target=catzip servant
from next.log
Info: Annotating ports with timing budgets for target frequency 40.00 MHz
Info: Max frequency for clock 'wb_clk_$glb_clk': 72.77 MHz (PASS at 40.00 MHz)
Info: Program finished normally.
icepack servant_1.1.0_next.asc servant_1.1.0.bin

[develone]

see mydoc/notes.txt, mydoc/myhelloworld.png mydoc/usbsetup.png

[develone]

description : Catboard iCE40HX8K package CT256 FPGA board

[develone]

initial documentation.

[olofk]

Thanks for your contribution. This looks all good if we just drop the mydoc dir. Do you want to do this, or should I do it when I merge?