Mitch Bailey

Allow cell flattening in magic extraction

2

### Prompt Currently, magic extracts each layout cell separately. This can lead to confusing netlists with unnecessary hierarchies when using parameterized layout cells from GDS. For example, `nmos_m10_w7_000_sli_dli_da_p` in the...

## Expected Behavior spice/cdl/layout should be electrically equivalent. ## Actual Behavior cdl/layout has short resistor before the output X. spice does not. ## Steps to Reproduce the Problem Just look...

Some standard cells with parallel series connections fail netgen LVS

6

CDL has parallel mos in series. layout has series mos in parallel. Logically equivalent, but not topologically equivalent. https://skywater-pdk.slack.com/archives/C017UA7LEUV/p1604453653008500 ## Expected Behavior ``` Circuit 1 contains 8 devices, Circuit 2...

Off-grid standard cells

5

## Expected Behavior All layout patterns should be on grid. ## Actual Behavior When reading gds into magic, offgrid warnings are generated. ``` Reading "sky130_fd_sc_hd__a2111o_1". CIF file read warning: CIF...

## Expected Behavior Expect the extracted spice netlist to match the spice netlist in the library file `/spice/.spice` ## Actual Behavior Cell: `sky130_fd_sc_hd__conb_1` spice library ``` .subckt sky130_fd_sc_hd__conb_1 VGND VNB...

LVS/CVC issues with caravel modules

2

This issue is an on going list of the device level LVS and CVC issues with caravel modules. origin/develop commit 384a7d517a82c49a0c4411c8132ce3f97eebfad5 `magic 8.3.133` The indentation of the list is intended...

caravan.spice file used for pre-check is missing top_level connections

5

The pre-check uses `caravel/spi/lvs/caravan.spice` to check the connections to `user_analog_project_wrapper`. It is expecting `vccd1_core` to be connected to `user_analog_project_wrapper/vccd1` but the netlist has `mprj/vccd1` connected instead. All instances in the...

[[caravel](https://github.com/efabless/caravel)/[docs](https://github.com/efabless/caravel/tree/main/docs)/[source](https://github.com/efabless/caravel/tree/main/docs/source)/supplementary-figures.rst](https://github.com/efabless/caravel/blob/main/docs/source/_static/die_pads.svg) The diagram for Die arrangement and pins indicates that `mprj_io[0:7]` have fixed defaults but the actual `scripts/gen_gpio_defaults.py` only has fixed values for `mprj_io[0:4]`.

make ship/truck traceability

1

`make ship/truck` uses data from several repos (user_project, `caravel`, and `mgmt_core_wrapper`) to create the final `caravel/caravan` design. It would be helpful to know what repo commits were used - especially...