VeeR-ISS
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chipsalliance
Hello, Is there a feature to add custom instructions like adding custom CSR?
This PR should fix compilation on ARM (and possibly other non-x86) architectures by adding conditional inclusion of the SSE2 `emmintrin.h` library. Fixes https://github.com/chipsalliance/VeeR-ISS/issues/25
Currently our attempts to build `whisper` on ARM-based computers fails. Apparently, this is due to the use of Intel-specific `emmintrin.h` library in the codebase as in the following: [#include ](https://github.com/chipsalliance/SweRV-ISS/blob/bd9ed972f91a97499940f166d45c1c55a010ec58/float.cpp#L21)...
Currently QEMU is likely the only supported simulator able to run zephyrOS. Now to run a new board zephyrOS does provide documentation guidelines to do so. I want to load...
Just curios, why we code like this? what's the benefit using "goto" with label addresses array than using the plain "switch"? https://github.com/chipsalliance/VeeR-ISS/blob/a6fabee95de4aa0f3e9b1ff97d02d1d7af62d3bd/decode.cpp#L1922
Type of issue: bug report Impact: Compliance with the privilege spec. From privilege spec (20190608) section 4.3.1: ``` For non-leaf PTEs, the D, A, and U bits are reserved for...
Hello previously i was using whisper and to terminate the program execution i have to use the flag tohost to terminate my test. Now i am working on one of...
