UHDM-integration-tests

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Add ParameterWithOverriddenWidthInitializedByConst test

3

RRozak

Add NestedAssignmentPattern test

1

rkapuscik

rkapuscik

Add PatternTypeInNestedModule test

3

RRozak

EarlGrey: clkmgr_byp doesn't work in Verilator

1

I created the test: https://github.com/chipsalliance/UHDM-integration-tests/pull/585 It has some errors about unknown variables. The original verilator passes it.

RRozak

This PR adds test with different types of multirange bit-select/part-select. It is used to test support for multiranges with uhdm-plugin and upstream yosys. Signed-off-by: Kamil Rakoczy

kamilrakoczy

EarlGrey: otbn_rnd.sv doesn't work in Verilator

1

RRozak

EarlGrey: otbn_stack.sv doesn't work in Verilator

1

It hangs in infinite loop. I created the test: https://github.com/chipsalliance/UHDM-integration-tests/pull/566, but it is passed already.

RRozak

EarlGrey: adc_ctrl_core.sv doesn't work in Verilator

2

RRozak

EarlGrey: kmac_entropy.sv doesn't work in Verilator

3

RRozak