chenbo

Firstly, I will focus on sgDma and MMIO based on transaction layer(in detail, it's PG195 UltraScale+ Devices Integrated Block for PCI Express)

Yes, currently, I am working for this.

I will develop a component to replace it.

sorry for my late. > Hi ^^ What memory bus are you targeting ? Currently, they are axis and axi, thank you for updating dmasg, I will try to use...

> dmasg is very very generalist. When i designed it had the hope that it would be usefull for peripherals, but overall, now, i have the feeling that in most...

> Look at the Corundum project on GitHub. It has PCIe SGDMA for Intel and Xilinx. > > But from RIFFA you can also learn a lot. > > Do...

> Regarding #1213 Hi, I think there should be some document on it or test on it using an Altera/Xilinx development board. @likewise @chenbo-again > > I have a vcu118...

> because we need to overwrite `buildComponent` and stick to it's interface it's clunky to use if a component has more then one parameter Because we need to generate a...

sure, I will do later.

I wonder how to trigger main func in `tester` folder, I can not do that, sorry for my poor knowledge of sbt.