Charles Keepax

Still going through things but overall looks pretty sensible to me. Some initial thoughts/questions would be: 1) Do we really want to bypass all the frame allocation stuff? Feels like...

> Yes we _could_ enable a BPT/BRA stream on top of an existing audio transfer. We can use the remaining bandwidth. > > The problem is the other way around....

Apologies not sure how this got missed, but I believe this should be working now since: 7d65d70161ef ("ALSA: hda: cs35l41: Support more HP models without _DSD"). Which I believe was...

This laptop has host DMICs but is missing a quirk for such, we are looking at putting together a patch.

Alas a bunch of these SKUs ended up looking slightly different to what we expected. This needs some updates, we have a 4-channel topology, but not a 2-channel one. This...

Question 1 is probably, is the interrupt definitely edge triggered? And secondly, does it have to be? I would assume it is here and there is no option to switch...

I have had very occasional enumeration failures with cs42l43 on the TGL UpX, that has been on my list to investigate for a quite a while. This is probably a...

But first step would really be to check the hardware behaviour, we still haven't had any luck getting docs for the Cadence IP, although I assume this bit falls outside...

> > 1. 1.1 IRQ comes in, the IRQ is left enabled, 1.2 the state is set to handling, ... > > 2. If another IRQ comes in, we see...

So yeah checking the code (handle_edge_irq in kernel/irq/chip.c), it does indeed protect things with a spinlock. The IRQ docs contains a description of the edge IRQ flow: https://www.kernel.org/doc/html/v4.12/core-api/genericirq.html#default-edge-irq-flow-handler Here is...