Chris Fallin
Chris Fallin
I've been trying to get `perf stat` / `perf record` to work properly in a Linux aarch64 guest in UTM on my M1 hardware. My use-case is the need to...
This is a work-in-progress, and meant to sketch the direction I've been thinking in for a mid-end framework. A proper BA RFC will come soon. This PR builds a phase...
Fixes #3761 (again). I'm not sure about adding LICENSE to *all* of these crates, but it seems that it doesn't *hurt* exactly (all the code is covered under the license...
A number of architectures require us to reason about aliasing registers; for example: - On AArch64, the standard (AAPCS) calling convention specifies that the *lower half* of some vector (128-bit)...
The register allocator should be able to decide to recompute a value rather than reload it from a slot, in cases where this is cheap. (E.g., if a value produced...
With the following program (tested on SBCL), there seems to be a conflict of some sort between optima's `match` and rutils' `iter`: (ql:quickload :rutilsx) (ql:quickload :optima) (defpackage :bug (:use :cl...
In #3202 and a number of past issues as well, we've repeatedly encountered some uncertainty as to (i) how boolean values of varying widths are stored in registers, (ii) whether...
This is a simple error in the const-prop rules: uextend was not masking iconst's u64 immediate when extending from i32 to i64. Arguably an iconst.i32 should not have nonzero bits...
This change adds another variant of the spec-tests run as part of the `wasmtime-cli` crate's unit tests: Cranelift with egraph-based optimizations enabled. We intend to test egraphs in various ways...
Previously, the proof-carrying code (PCC) mechanism optionally described each value in the program with at most one fact of the form: - A static range (min, max are `u64`s); -...