Chris Fallin

A bit of an update: I was able to spend a today today working on isolating and putting together a patch for the last bits of weval support to upstream...

Hi @hungryzzz -- while we appreciate these reports, they seem to be generated by some infrastructure and "mass-produced", so to speak, so to help us out, it may be good...

Thanks @hungryzzz. Unfortunately there's still a nontrivial diff, I guess I had hoped for a little more investigation to point to exactly what the microarchitectural difference was; take the two...

Ah, if making that assignment from local 6 to local 5 unconditional causes the performance delta to disappear, likely what is happening here is that you're seeing the lack of...

The direct cause of the perf delta seems to be the additional spills, as @iximeow pointed out.

Ah, interesting, there may be something odd about the way we lower stores-of-immediates in the x64 backend that precludes this case -- @abrown do you think you'd be willing to...

@hungryzzz the issue was a missed case in the instruction lowering. x86-64 has a store instruction (a form of `mov`) that can store arbitrary 32-bit values to the destination; however,...

@hungryzzz we're happy to help with questions like these, but the Bytecode Alliance [Zulip](https://bytecodealliance.zulipchat.com/) is probably easier for such discussions (that are really about how compilers work rather than resolving...

Cleaning up old issues and I believe this is covered now by the exceptions support we landed recently (#10510). Thanks all (and thanks bjorn3 for the experimental work that helped...

Right, this issue was specifically about Cranelift exceptions, @whitequark -- I will hopefully get time to do the Wasmtime side soon (next few months-ish)...