Bastian Löher
Bastian Löher
This compiles fine with Vivado 2018.2, however when trying to connect with corecount, it does not print anything. Resource utilisation is as such: ``` +----------------------------+-------+-------+-----------+-------+ | Site Type | Used...
I've tried to extend the apio SConstruct to also support a VHDL toolchain, making use of yosys and the ghdl-yosys-plugin for synthesis. For simulation, plain ghdl is used instead. The...
… bench. These inputs are missing, when one wants to run the ISERDES in OVERSAMPLE mode.
VTR fails with the following message when running the code below: ``` Error 1: Type: Blif file File: top.eblif Line: 204 Message: Failed to find matching architecture model for 'ISERDESE2'...
I have not run the fuzzer, but am mainly asking if this is a sane change, since this is the first time I'm looking into this code. I have hopes...
I've got a new and shiny Cmod A7 to play with, so here ya go!
What is observed: * A compiled litex bitfile for CMOD A7 35t using symbiflow toolchain does not work * LED chaser does not blink the LEDs * logging in via...
I just got a Cmod A7 35 today to play around with. So, here ya go!
Signed-off-by: Bastian Löher