Add support for OCLK and OCLKB inputs of ISERDESE2. Add matching test…

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… bench.

These inputs are missing, when one wants to run the ISERDES in OVERSAMPLE mode.

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I'm still trying to wrap my head around the big picture: When installing symbiflow via symbiflow-examples, will the changes here eventually end up in this file?

symbiflow/xc7/install/share/symbiflow/techmaps/xc7_vpr/techmap/cells_map.v

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Issue #2337 is related to this PR.

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Uh oh, xc-fasm does not like these. Something is missing. I'm getting these messages from fasm:

  File "/home/bloeher/opt/symbiflow/xc7/conda/envs/xc7/lib/python3.7/site-packages/prjxray/fasm_assembler.py", line 190, in parse_fasm_filename
    raise FasmLookupError('\n'.join(missing_features))
prjxray.fasm_assembler.FasmLookupError: Segment DB LIOI3_TBYTETERM, key LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IMUX31_1 not found from line 'LIOI3_TBYTETERM_X0Y13.IOI_OCLKM_0.IOI_IMUX31_1'
Segment DB LIOI3_TBYTETERM, key LIOI3_TBYTETERM.IOI_ILOGIC0_OCLKB.IOI_OCLK_0 not found from line 'LIOI3_TBYTETERM_X0Y13.IOI_ILOGIC0_OCLKB.IOI_OCLK_0'

This is probably caused by the fact that

prjxray-db/artix7/segbits_lioi3_tbyteterm.db

is missing the appropriate lines

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I've run the code now with the Vivado toolchain and have discovered that a few things need to be connected in order to produce a valid bitstream with Vivado.

There needs to be a MMCME2_ADV generating the clocks, which then connect to clk/clkb/oclk/oclkb. Also the rst signal was not connected.

With these changes I can also produce a valid bitstream using the Symbiflow toolchain. So, I think that the additional fuzzing suggested above is not needed.