Ben

Quick quistion, is it possible (in a multiple verilog source prodject) to verify and simulate one specific source file? So for example when you have a clock devider and a...

unable to reprograme nanovna-h

2

When I try to connect to the nanovna in the stm cube programmer, I get the error that the device is under read protection(see included photo). Does anyone know how...

fatal error: ble_conn_state.h: No such file or directory

1

dear sir I'm trying to run you'r ble multirole example on an nRF52 breakout board, but i get the following error:" fatal error: ble_conn_state.h: No such file or directory". do...

update tutorial for the Visual studio code extention

4

Would it be posible to make a tutorial installin the pimoroni c libaries using the new visual studio code extention?