Matt Arsenault
Matt Arsenault
> @arsenm and @aeubanks, please let us know if you see any critical problems with this approach, and we can implement the same as a separate pass. I'd rather have...
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> See:#168838 This was reverted, and the contentious part is signaling nan handling. One of the reasons simply reverting this is wrong is the signed zero behavior should remain regardless...
*[`llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll` line 11831 at r6](https://reviewable.io/reviews/llvm/llvm-project/137367#-OgYe6Ok2-8DTlsZkshG:-OgYe6Ok2-8DTlsZkshH:b-xek7ug) ([raw file](https://github.com/llvm/llvm-project/blob/b62e0d67a1eb40791eefce0ae1084098dc4095ed/llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll#L11831)):* > ```LLVM > ; GFX90A-NEXT: .LBB148_1: ; %atomicrmw.start > ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 > ; GFX90A-NEXT: v_cmp_u_f16_e32 vcc, v5,...
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