Anton Blanchard comments

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                                            Anton Blanchard

improve building without docker

Thanks @BracketMaster! I just approved a PR from @carlosedp to use `fusesoc` for building, I wonder if that helps you too?

Add Support for VHDL to Yosys and SymbiYosys Backends Via the Yosys GHDL Plugin

We'd also be interested in this for [Microwatt](https://github.com/antonblanchard/microwatt). Right now we use fusesoc for synthesis with the proprietary tools, and Makefiles for synthesis with yosys. Being able to use fusesoc...

Device Specific Calibration

My DPS5005 exhibited the same issue. Before flashing I had taken dumps at a few voltage levels, so I could work out the correct V_DAC_K and V_DAC_C settings: ``` #define...

Some magic.lef files have multiple ports per pin causing pin access issues with TritonRoute

I tripped over this again when hardening a macro with `sky130_fd_sc_hd__fa_1` cells in it. @RTimothyEdwards any thoughts on how best to fix it?

Minimum Enclosed Area Rule is not covered by the technology LEF for sky130_fd_sc_hd and sky130_fd_sc_hdll libraries

I can confirm this fixes the issue for me.

At least one cell (sky130_fd_sc_hd__clkdlybuf4s15_1) violates SkyWater's own DRC rules and needs to be fixed.

I had a quick check of all the `sky130_fd_sc_hd` cells, and I could only find one additional cell that had a poly overlap issue. The full list: ``` sky130_fd_sc_hd__clkdlybuf4s15_1 sky130_fd_sc_hd__clkdlybuf4s18_1...

At least one cell (sky130_fd_sc_hd__clkdlybuf4s15_1) violates SkyWater's own DRC rules and needs to be fixed.

@ax3ghazy I did run with `drc(full)`. Here's the magic TCL script (does it cover everything?): ``` gds read $::env(GDS_FILE) select top cell drc euclidean on drc style drc(full) drc check...

At least one cell (sky130_fd_sc_hd__clkdlybuf4s15_1) violates SkyWater's own DRC rules and needs to be fixed.

I tested the hs cells and found: ``` sky130_fd_sc_hs__dlygate4sd3_1.gds Diffusion contact to gate < 0.055um (licon.11) ``` ``` sky130_fd_sc_hs__decap_8.gds Diffusion contact to gate < 0.055um (licon.11) ```

KernelStats doesn't handle CPU hotplug (discontiguous CPUs)

Thinking about it some more, I can pull that data from CpuInfo. A bit of extra work to get there though.

Add word width to clock_periods

I also added timing for a couple of 64bit DFFRAM instances