Andrew Butt

This looks like it will work fine. I don't think there will be any difference after synthesis because essentially all you're doing is making the register explicit instead of using...

Can we take another look at this soon? Would be a useful feature to have.

Yeah this definitely seems like something that should be run nightly. I'm not sure there's anywhere that builds docker images for CIRCT with any regularity. Running nightly on the current...

I think I found a solution to this problem: https://github.com/cornell-zhang/amc-dialect/pull/64

Yeah so this is the code before the pass: ``` module { func.func @kernel(%arg0: memref) -> i32 attributes {itypes = "s", otypes = "s", top} { %c0_i32 = arith.constant 0...

Your explanation makes sense @chhzh123 but I wonder what optimization HLS is doing to avoid this issue. Does it just fully unroll the copy loops so the extension and truncation...

I think if/when this gets merged this should not be made the default yet. As mentioned on slack I have concerns that this will have unintended effects on resource utilization...

I'm not sure that `compile.futil` is the right place for this primitive since it's not required to compile Calyx programs to verilog. I agree it would be nice to have...

This is failing some test cases and I'm not really sure why.

Just want to add that these changes will also benefit the allo -> amc -> calyx flow significantly. The previous workaround works for now, but having true >64 bit int...