Aman Arora

Results 4 issues of Aman Arora

Moving from email to GitHub feature request. #### Proposed Behaviour Provide support for simple dual port (SDP) RAMs in ODIN/ODIN+Yosys ![memory_ports](https://user-images.githubusercontent.com/35443216/184049245-d8963197-12cc-4644-8c2b-6e4f7fa1a904.png) #### Current Behaviour Currently, only single port (SP) and...

Odin
Yosys+Odin-II

#### Expected Behaviour The resource usage between the two flows should be similar. #### Current Behaviour For the CLSTM benchmark, we are seeing the resource usage differ greatly when we...

In a design where we have DSP blocks instantiated and connected using chains, we see an error during placement. The error is that the placer can't find an empty dsp_top...

#### Expected Behaviour When a BRAM/memory is inferred from behavioral Verilog code, both flows - ODIN only and ODIN+Yosys - should result in the same hardware. #### Current Behaviour There...