Umer Shahid

ISAC not calculating coverage for CSR which are getting updated only in trap handler

1

Dear All, I have written a basic test in which I am causing illegal instruction exception in M-mode. Here is the test. [basic.txt](https://github.com/riscv-software-src/riscv-isac/files/9811168/basic.txt) This exception will update mcause register and...

I have added the coverpoints for PMP compliance coverage in rv32i_priv.cgf and rv64i_priv.cgf for PMP compliance tests. The tests have also been pushed in riscv-arch-test repo

While testing a basic code in S-mode, I and @allenjbaum have noticed peculiar behavior in PMP NAPOT mode. I am dragging through the problem with the following example: We tried...

Recent Changes in Sail Log has broken riscv isac flow

4

Dear All, Some recent change in Sail log has completely broken the [riscv-isac](https://github.com/riscv-software-src/riscv-isac) flow to find the coverage of arch-tests. Previously Sail log used to look like below, and there...