Arjan Bink comments

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                                            Arjan Bink

Security hole in hardware loop, sketch of a possible mitigation

Okay with me

Software control of mcontrol6.hit0 and mcontrol6.hit1 and clearing of mcontrol6.hit0 and mcontrol6.hit1

Hi @pdonahue-ventana Thank you for your quick answer. That makes complete sense. Just having the sentence somewhere that hardware writes are limited to writing 1, 2, or 3 would suffice...

How to run ISS with spike

>> If you have a more complex core that supports OoO execution or can retire multiple instructions in a single cycle then you'll want RVVI. @MikeOpenHWGroup , what is the...

Fixed XIF Control Signals for Sticky Accept/Reject

Hi @Aidan-McNay Thank you very much for your contribution and apologies for our slow response! Could you please in words describe a scenario that would be fixed by this PR?...

Documentation: load/store error

@silabs-mateilga Can this issue be closed now?

unique case statements consistently triggers warnings/non-fatal errors during reset

@silabs-hfegran Can you please close this if indeed fixed?

Issue illegal instruction for deconfigured B extensions

@silabs-oivind Please close this issue if you agree it has been solved.

Sticky version of debug request

Can be closed once user manual has been updated as well.

User Manual: Update the debug description

@silabs-robin Can you please close this ticket if agreed? (The points I raised have been addressed.)

[XIF] LSU may send mpu_status to WB too early

Removing resolved label as applied fix does not actually address the stated issue. The MPU status can still get updated too early. In the applied fix it is just kept...