Lofty
Lofty
The EE Core has multiple pipelines (it's 2-way superscalar), but it requires the programmer to manually emit (INSN)1 opcodes to harness the otherwise dormant second pipeline. Perhaps a routine for...
Although it has 64-bit addition/subtraction, it doesn't have a 64-bit multiply/divide unit, which is frustrating.
I don't know how much effort it will be to ensure Clang doesn't emit these instructions for atomic locking on a single core CPU.
The EE Core has a SIMD-ish extension called Multimedia Instructions. It is quite an eclectic mix, and I would have to go through it in more detail to see what...
The EE can use VU0 through the coprocessor 2 interface to give it upper or lower instructions. This isn't quite as efficient as using VU0 in micro mode, but it's...
The PS2's FPU behaves in a distinctly non-IEEE 754 fashion; there are no traps (this can be fixed by checking flags, perhaps), a fixed rounding mode (truncation), no NaNs or...
(Sorry, I accidentally hit enter) I'd like to propose some API for things like getting the most/least significant bit index, along with getting the number of set bits in an...
Hi, I'm Lofty, and I'm one of the maintainers of [ckb-next](https://github.com/ckb-next/ckb-next). Since the project aspires to be vendor-neutral, I figure that you'll get a request sooner or later to add...
Steps to reproduce: - `git clone https://github.com/ZirconiumX/Dorpsgek` - `intercept-build make` - `c2rust transpile --binary main --reorganize-definitions compile_commands.json` Expected result: Code compiles cleanly Actual result: ```rust error[E0308]: mismatched types --> time.rs:115:68...
For "pattern syntax" in `Case` and `Value.matches` it's not obvious where the least significant bit is in the pattern (first or last character in the string). It would be nice...