Rahul-Kande

Hi, I am trying to setup the rocket-chip processor using the Chipyard framework. I want to simulate the rocket chip using the Synopsys VCS simulator. I am able to compile...

Running proxy kernel on Openpiton

2

Hello, May I know if there is a way to run proxy kernel on openpiton (https://github.com/riscv/riscv-pk) through simulation and through running openpiton on AWS F1 instances? I am planning on...

Unable to write to the EEAR register from the supervisor mode.

4

The OpenRISC specification requires that the EEAR register be accessible from the supervisor mode but the mor1kx implementation does not have the option to write to EEAR with the mtspr...

The EPCR register is accessible from user mode

3

The OpenRISC specification requires that the EPCR register be accessible only from supervisor mode. Bug location: rtl/verilog/mor1kx_ctrl_cappuccino.v Triggering input: #include int main() { // enter user mode : asm volatile...

The carry flag implementation is not correct for subtract instructions

2

The carry flag value is not as expected for some cases. For instance, with the following trigger input, since r1 > r3, carry flag should be reset, but it is...

Running Opentitan ELF files on spike

3

Hello, I am trying to simulate the spike with elf files generated from the Opentitan SoC software (https://github.com/lowRISC/opentitan/tree/master/sw/device/examples/hello_world). I have tried to run it in both baremetal and pk methods....

Getting error when opening the OpenOCD

1

Hello All, I have installed the OpenOCD from the link given in the Makefile of the tutorials (https://github.com/openrisc/tutorials/releases/download/2016.1/openocd.tgz). I have programmed the De0_ano board with the de0_nano.jic file generated by...