Ryszard Rozak

Results 68 comments of Ryszard Rozak

It waits for https://github.com/chipsalliance/Surelog/issues/2365

It waits for https://github.com/chipsalliance/Surelog/issues/2141

It doesn't work due to warning: `ParameterWithOverriddenWidthInitializedByConst//top.sv:9:45: Value too large for 1 bit number: 15`. It is thrown during reading uhdmAllModules section in which the parameters have default values. It...

I created the test, but it is passed already: https://github.com/chipsalliance/UHDM-integration-tests/pull/555. Maybe the problem is not with that module.

These errors can be reproduced by https://github.com/chipsalliance/UHDM-integration-tests/pull/587

Unpacked unions are unsupported by both verilators and both yosys. It's better to wait with the merge until there will be at least one tool that can be tested on...

It waits for https://github.com/chipsalliance/Surelog/issues/2394

Blocked by https://github.com/chipsalliance/Surelog/issues/1808

Uhdm verilator prints 28, but the original prints 24