Ryszard Rozak

Results 68 comments of Ryszard Rozak

As I said in #3590, I think it would be better to make sure that each tristate node has user1p() and just use it. But I don't know if it...

I needed it for https://github.com/verilator/verilator/pull/3580, but after the discussion I changed the approach and currently don't continue work on comparisons with `z`. This PR fixes comparisons with expressions of three...

Thanks, you're right. In the description I meant `a === 1'z`.

Yes, it accepts. Casting would be if I wrote `1'(z)`.

I changed it to `1'bz` to be sure that it is a proper constant according to standard. It didn't change the behavior.

Yes. It looks that you're right. _023_begin.tree looks accurate. The problem is in _024_tristate.tree. Let's use simplified code from the description to investigation: ```systemverilog module t (input wire clk); wire...

The problem is that some nodes marked as non-tristate (by non-tristate I understand that they don't have user1p) are actually tristates. That's why in this PR https://github.com/verilator/verilator/pull/3604/ I added a...

Thank you. I created the workaround, so I don't need it now.

Verilator currently handles inout arguments as C++ ref. #4489 makes ref arguments being handled in the same way as inout. It isn't 100% correct, but I think it works incorrectly...

As I see, the copying of `inout` arguments was recently added: https://github.com/verilator/verilator/commit/ab13548018e3db957920bdcdc593358602ca87d9. In order to support `ref` arguments correctly, I need to handle them as inout arguments were handled previously....