P33M

If the switch really needs 1000x the minimum required Tperst-clk, then there's an issue - there's no easy way to extend this time.

I think I may have found a way to optionally delay PERST# deassertion with a magic register bit in PCIE_MISC_HARD_DEBUG - bit 3 directly controls the output pad. If I...

LGTM - this matches what we have been testing internally

Your listing has bMaxBurst=0 for all of the endpoints in any of the configurations / alternate settings. So the burst OUT bug, and the corresponding fix, doesn't apply. If the...

@aallan the clock infrastructure is a user-facing feature, and has been explicitly designed with the intent of supporting a wide range of use-cases. This issue should not be closed.

Me. But I need to a) find time to do so b) refresh my knowledge of what non-functional (test, debug, ATE) clocks were added to the already enormous functional clock...

PIO's only clock source is the system clock, i.e. the same as the M3s.

With the hub plugged into a Pi, please post the output of `sudo lsusb -v`. Also busting it open and getting the controller IC part number would be useful.

It appears the hub is very flaky when talking to low-speed devices if operating in full-speed mode. I attach a Teledyne Lecroy analyser trace showing multiple errors - it appears...

Every single other host will use the hub in high-speed mode, which fundamentally changes the signalling involved - communication with the low-speed device is handed off to the hub's transaction...