P33M

If you have analyser logs then please upload them. Although, you should probably find out why `igc_acquire_swfw_sync_i225` is failing with -EACCES.

The Pi 5 trace is self-explanatory - it looks like the memory space just reads back as zero. Possibly some ROM routine hasn't completed? The CM4 trace appears to be...

To reduce the analyser churn to a minimum when capturing snapshot traffic, what I do in Recording Options is filter out: - SKP OS - UpdateFC DLLP And turn off...

There's a smattering of other reports (on PC) where the same failure mode crops up randomly. https://www.mail-archive.com/[email protected]/msg1856970.html https://bbs.archlinux.org/viewtopic.php?id=272719 The pattern is "doesn't work" -> some unrelated change happens -> "oh...

There may be an intermediate clock domain running at neither 54MHz nor arm_freq - does the ARM AXI and/or L2 frequency change with arm_freq?

Please update to the latest kernel in apt (6.6.y) and retest.

Yes, the supportable configurations are - Ganged and grouped Vbus/OC - Grouped Vbus/OC - Individual Vbus/OC Individual breaks out each port's overcurrent and vbus_en signal, derived from the respective xhci...

One proposed patch on the linux-pci list: https://lore.kernel.org/linux-pci/385baf9dbfb6b65112803998dfc0cd6f84a5e6ba.1691296765.git.lukas@wunner.de/ I think the author is correct in that accesses when the link is doing a retrain result in fatal errors, but I...

Ugh, even CRSV=1 doesn't work in all cases. I have an Etron EJ188 xhci controller which, if plugged into the switch's downstream port, occasionally responds to the first config _write_...

No, but there's some terminology in this thread that needs clearing up - Referring to the CEM specification v4 rev 1.0, figure 8, the critical time periods are 1 through...