OBarronCS
OBarronCS
Hmm. Looks like the way the registers are defined in regs.py aarch64 that LR will indeed be displayed twice - this is an exception, as all the other arches have...
This latest small commit removes the displaying of duplicate regs. In only changes the register definitions of AArch64 and RISCV, which had the link register listed as a `GPR` register....
Related issue: #1097
Did some digging - looks like the gs/fs registers are not exposed to user space programs in Windows the same way they are in Linux. Couldn't find too much information...
Looks like Ruff has just added support for this feature (making sure Python code is compliant for some target version). https://redirect.github.com/astral-sh/ruff/issues/6591#issuecomment-2733620162 https://docs.astral.sh/ruff/settings/#target-version
Updating to `ruff==0.11.10` would fix this
I think I have the root cause - I noticed that the default value of `CPSR` (when read immediately after initialization) is `0x400001d3`. The bottom bits indicate `supervisor` mode. Arm...
Perhaps there is a better place for the lookup function to exist - presently, I placed it in `gdblib/heap/__init__.py`
Thanks for the review and suggestions - I'll be making these changes 😊 What are your thoughts on potentially adding a number that indicates the index in the corresponding free...
I'm going to close this for now - thanks for all the comments. To implement this in the future, it would be great for the fix to involve determining a...