NikLeberg

Hey @hgarrereyn, I now sometimes (around 50% of the time) have a doubled output when I run the writer. It seems as if libFuzzer is running the crash twice. Have...

I played around a bit with a debug libFuzzer build. The second call to `LLVMFuzzerTestOneInput` comes from an invocation of [`TryDetectingAMemoryLeak`](https://github.com/llvm/llvm-project/blob/9e7b7303f1d3556756d7c4db8fa02969c8f11c58/compiler-rt/lib/fuzzer/FuzzerLoop.cpp#L672). Under some circumstances libFuzzer thinks a leak happened and...

Hi there @stokdam! I totally agree, the bus interface can be improved upon. I did not touch the topic since the discussions in #573 though, i.e. did not implement any...

Let's assume the following burst write transaction:  Master is writing five words of data over the bus and incrementing `adr` by 4 each clock. The slave has a delay...

I did check the HDL and found that almost all slaves on the internal bus seem to only ever have a latency of 1 from `re` or `we` to `ack`...

> * In contrast to the caches the DMA also requires constant address burst (for example for copying a memory block to a single IO device register like UART). That...