Nic30

Hello, what is the result of the integration? I am trying to create variant of @marcusj6 algorithm for FPGA + HBM memory. @marcusj6 are you still interested in PartitionSort development?...

Hi @marcusj6, in DPDK they are using SIMD to achieve much faster evaluation of the tree https://github.com/DPDK/dpdk/blob/master/lib/librte_acl/acl_run_avx2.h Do you know about anyone who tried to do same thing with PartitionSort?...

Also are you thinking about using lets say libboost? I mean there is plenty of red-black tree related code which is already written in other libraries and which is quite...

@marcusj6 > B+tree I was also thinking about it, few months back It was not suitable for hardware implementation. But now for the software, ... There are plenty of efficient...

I can potentially programmatically migrate [hdlConvertor](https://github.com/Nic30/hdlConvertor) grammars to tree-sitter from Antrl4. However I have never seen a comparison where Antrl4 lost against the tree-sitter (I am trying to help wherever...

@m-kru > 'why tree-sitter' arguments. I always wanted to try how incremental parsing works on larger scale with a complicated grammar like System Verilog it could be very tricky, because...

@jeremiah-c-leary > could someone write a parser for the VHDL LRM that would automatically create a parser for VHDL https://github.com/Nic30/VHDL_and_SV_formal_grammar_to_ANTLR4 (But I had to do some manual tweaking on the...

Where the information about compatibility should be specified? ([my custom widget](https://github.com/Nic30/jupyter_widget_hwt) )

As a user I have to say: Every ever lasting problem with Jupyter, like this one, really makes me want to to use Apache Zeppelin instead. There is probably so...

@le-cds the thesis label means that you have a student for this task or that you created the topic for student thesis?