MohamedElgammal

I think it is an infrastructure issue as it is happening in other PRs as well.

I am not sure which tests are currently failing. However, I will attach a conversation I had with Sara before in which she pointed me how to manually run floorplanning...

@zhaisitong Kindly find attached the updated architecture file [stratixiv_arch.timing.xml.zip](https://github.com/verilog-to-routing/vtr-verilog-to-routing/files/9528429/stratixiv_arch.timing.xml.zip)

@zhaisitong I didn't merge my API into Sarah's code. I did some refactoring for the original packing code and the first function of my API into master in PR #2034...

@zhaisitong Yes, all the refactoring commits were merged into master on May 27

@aman26kbm Thanks for raising this issues. I have looked into it and it's failing to find a location for multiple DSP blocks in this design as the utilization of the...

@saaramahmoudi

@vaughnbetz you are correct. This PR was overtaken by others. Closing it.

looking good to me .. We need to have a second look on the failing tests ... let me rerun them and update you

@AlexandreSinger : Thanks for rebasing it. @vaughnbetz : this branch should be good to be merged if it passes (I think it will pass anyway as the API isn't used...