Mostafa Rady

Linker script contain different memory size than generated regions.ld

1

file [section.lds](https://github.com/efabless/caravel_mgmt_soc_litex/blob/caravel_redesign/verilog/dv/firmware/sections.lds#L16) uses the old size of user project area. Is this intended ?

Add cocotb flow to caravel_user_project_analog and port the mprj_por …

2

…test to cocotb

'mem' reg in the models are defined after it is used so it needed to be declared. it give the following error: ``` Error-[IND] Identifier not declared /home/karim/actions-runner-2/_work/Cheetah_V3/Cheetah_V3/dependencies/pdks/sky130A/libs.ref/sky130_sram_macros/verilog/sky130_sram_2kbyte_1rw1r_32x512_8.v, 59 Identifier...