JackAKirk

add queue.wait() to sync interop stream

5

Signed-off-by: JackAKirk # Description This is a bug fix for failures first identified since the multi-streams implementation of the cuda backend in intel/llvm (failures identified here https://github.com/oneapi-src/oneMKL/pull/209#issuecomment-1192001880): The failed tests...

[SYCL][CUDA][MATRIX] joint_matrix_bmad implementation

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cc @dkhaldi Implementation corresponding to the matrix extension proposal section "Bitwise Multiply and Add" in https://github.com/intel/llvm/pull/4695 Integration tests here: https://github.com/intel/llvm-test-suite/pull/760

I've added the bmad (nvptx backend only) feature description that has made use of precision::b1 in the implementation here: https://github.com/intel/llvm/pull/5363 I can also add some other nvidia specific information as...

[SYCL][CUDA] Allow joint_matrix to be loaded from const T

5

Fixes a bug where if `joint_matrix_load` attempts to load `joint_matrix` from an array of `const T`incorrect behaviour will occur or an error will be thrown. To fix this we make...

[SYCL] Fix broken uniqueness in make_device

7

This is a general fix for https://github.com/intel/llvm/issues/6055. CUDA device interop is not available yet but a corresponding fix will be added to the CUDA specialization of `make_device` in https://github.com/intel/llvm/pull/6202 shortly....

[SYCL] Fix marray math function impls

36

This PR aims to fix issue : https://github.com/intel/llvm/issues/5991 and provide efficient working marray math function implementations for all backends. marray math function support is currently switched on for {n} ({n}...

[SYCL][CUDA] Layout accumulator is specified at load/store.

1

This is a move towards the future looking joint_matrix, joint_matrix_load, joint_matrix_store APIs. The aim is to make the CUDA and Intel implementations of the joint_matrix extension use matching interfaces, whilst...

Move `lapack_info_check` inside of `onemkl_cusolver_host_task`

2

# Description In some cases cuSolver operations can return a successful error code while failing. The previous implementation of this check is done via SYCL and requires the CPU to...

[CUDA][LIBCLC] Fix fence impl to satisfy SYCL 2020.

1

- make relaxed fence a no op to satisfy the SYCL spec. - make acquire/release/acq_rel use the lighter acq_rel fence for sm_70 instead of the seq_cst fence.

Device assert broken on gfx1030 with "Bus error", or hanging after synchronize

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If for example i add `assert(0);` to the kernel in the vectorAdd sample: https://github.com/ROCm-Developer-Tools/HIP-Examples/blob/master/vectorAdd/vectoradd_hip.cpp via ``` diff --git a/vectorAdd/vectoradd_hip.cpp b/vectorAdd/vectoradd_hip.cpp index 0362c8a..a20bd2c 100644 --- a/vectorAdd/vectoradd_hip.cpp +++ b/vectorAdd/vectoradd_hip.cpp @@ -47,7 +47,7...