CensoredUsername
CensoredUsername
`add xzr, x1, #0x1` is indeed unencodable, as can be seen in the [instruction reference](https://censoredusername.github.io/dynasm-rs/language/instructionref_aarch64.html) where the relevant format (two regs and an immediate) specifies: ``` add Xn|SP, Xm|SP, #uimm...
Found the bug, that part of the code also allows non-XSP family registers through so normal registers that aren't the zero reg can be used. This exemption is needed for...
In the meantime you can try this fix at 83743bf.
Whoops, guess that one got missed in the tld move. Thanks for reporting!
Hey there. That definitely sounds like an interesting use case. I've thought about it for a bit and with some changes it should be possible to support this mode of...
I don't think it would be necessary to reverse the order of the bytecode, just reversing the order of the calls would be enough. In the end the bytes should...
I'm not sure, sorry.
I've not thought of a feature like that, but it does sound interesting. Personally I've always just thrown generated bytes in a disassembler if I wanted to debug. I'm thinking...
I can investigate adding a no_std mode, but in this mode only basic things like the trait definitions will be exported. Most of the interesting runtime parts (executable memory handling)...
@losfair regarding leaving executable memory management to the user, the way current Assemblers are written is quite intertwined with this memory management, and there are a few ways I could...