Riscy-SoC icon indicating copy to clipboard operation
Riscy-SoC copied to clipboard

Published 20 hours ago • verified publisher icon AleksandarKostovic
→

Metadata

Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog

Results 2 Riscy-SoC issues
Sort by recently updated
recently updated
newest added

Linux compatibility

2 comment

Does this core runs Linux on it?

JOHNTBIJU avatar JOHNTBIJU

ERROR: Module `\cpu_mem' referenced in module `\cpu' in cell `\mem' is not part of the design

8 comment

yosys -p 'synth_ice40 -top top -json top.json' top.v .... .... .... 2.2.1. Analyzing design hierarchy.. Top module: \top Used module: \timer Used module: \uart Used module: \ram Used module: \cpu...

xdnf avatar xdnf

bug
help wanted

← Metadata

78
Stars
11
Forks
Watchers

Owner

verified publisher icon AleksandarKostovic

Metadata

Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog

Back